ST STM32F40 Series Reference Manual page 182

RM0090
Table 26. RCC register map and reset values for STM32F405xx/07xx and STM32F415xx/17xx
Addr. Register
offset name
RCC_APB1E
0x40
NR
RCC_APB2E
0x44
NR
0x48 Reserved
0x4C Reserved
RCC_AHB1L
0x50
PENR
RCC_AHB2L
0x54
PENR
RCC_AHB3L
0x58
PENR
0x5C Reserved
RCC_APB1L
0x60
PENR
RCC_APB2L
0x64
PENR
0x68 Reserved
0x6C Reserved
0x70 RCC_BDCR
0x74 RCC_CSR
0x78 Reserved
0x7C Reserved
0x80 RCC_SSCGR
RCC_PLLI2S
0x84 PLLI2SRx
CFGR
Reserved
Reserved
Reserved
Reserved
INCSTEP
Reserved
Doc ID 018909 Rev 4
Reset and clock control for (RCC)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PLLI2SNx
Reserved
MODPER
Reserved
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