Performance Monitor Data Registers (Pmd); Epilog Count Register Format; User Mask Format; User Mask Field Descriptions - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual

3.1.8.13 Loop Count Register (LC – AR 65)
The Loop Count register (LC) is a 64-bit register used in counted loops. LC is
decremented by counted-loop-type branches.
3.1.8.14 Epilog Count Register (EC – AR 66)
The Epilog Count register (EC) is a 6-bit register used for counting the final (epilog)
stages in modulo-scheduled loops. See
page 1:75. A diagram of the EC register is shown in
Figure 3-8.
63
3.1.9

Performance Monitor Data Registers (PMD)

A set of performance monitoring registers can be configured by privileged software to
be accessible at all privilege levels. Performance monitor data can be directly sampled
from within the application. The operating system is allowed to secure user-configured
performance monitors. Secured performance counters return zeros when read,
regardless of the current privilege level. The performance monitors can only be written
at the most privileged level. Refer to
Monitoring" in Volume 2
performance information for the execution of both IA-32 and Itanium instruction sets.
3.1.10 User Mask (UM)
The user mask is a subset of the Processor Status Register and is accessible to
application programs. The user mask controls memory access alignment, byte-ordering
and user-configured performance monitors. It also records the modification state of
floating-point registers.
the user mask fields. For more details on the PSR refer to
(PSR)" on page
Figure 3-9.
5 4
mfh mfl ac up be
1 1
Table 3-6.
Field
rv 0
be 1
Volume 1, Part 1: Execution Environment

Epilog Count Register Format

for details. Performance monitors can be used to gather
Figure 3-9
2:23.

User Mask Format

3 2 1 0
rv
1 1 1 1

User Mask Field Descriptions

Bit
Reserved
Big-endian memory access enable
(controls loads and stores but not RSE memory accesses)
0: accesses are done little-endian
1: accesses are done big-endian
This bit is ignored for IA-32 data memory accesses. IA-32 data references are always
performed little-endian.
"Modulo-scheduled Loop Support" on
Figure
ig
58
Chapter 7, "Debugging and Performance
show the user mask format and
Description
3-8.
6 5
epilog count
6
Table 3-6 describes
"Processor Status Register
0
1:33