Instruction Pointer; Current Frame Marker; Frame Marker Format; Frame Marker Field Description - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual

3.1.6

Instruction Pointer

The Instruction Pointer (IP) holds the address of the bundle which contains the current
executing instruction. The IP can be read directly with a mov ip instruction. The IP
cannot be directly written, but is incremented as instructions are executed, and can be
set to a new value with a branch. Because instruction bundles are 16 bytes, and are
16-byte aligned, the least significant 4 bits of IP are always zero. See
Encoding Overview" on page
zero extended 32-bit virtual linear address of the currently executing IA-32 instruction.
IA-32 instructions are byte-aligned, therefore the least significant 4 bits of IP are
preserved for IA-32 instruction set execution. See
page 1:117
3.1.7

Current Frame Marker

Each general register stack frame is associated with a frame marker. The frame marker
describes the state of the general register stack. The Current Frame Marker (CFM)
holds the state of the current stack frame. The CFM cannot be directly read or written
(see "Register Stack" on page
The frame markers contain the sizes of the various portions of the stack frame, plus
three Register Rename Base values (used in register rotation). The layout of the frame
markers is shown in
On a call, the CFM is copied to the Previous Frame Marker field in the Previous Function
State register (see Section 3.1.8.12, "Previous Function State (PFS – AR 64)"). A new
value is written to the CFM, creating a new stack frame with no locals or rotating
registers, but with a set of output registers which are the caller's output registers.
Additionally, all Register Rename Base registers (RRBs) are set to 0. See
"Modulo-scheduled Loop Support" on page
Figure 3-2.
37
rrb.pr
6
Table 3-2.
Field
sof
sol
sor
rrb.gr
rrb.fr
rrb.pr
Volume 1, Part 1: Execution Environment
1:38. For IA-32 instruction set execution, IP holds the
for IA-32 instruction set execution details.
1:47).
Figure 3-2 and the fields are described in

Frame Marker Format

32 31 25 24
rrb.fr
7

Frame Marker Field Description

Bits
6:0 Size of stack frame
13:7 Size of locals portion of stack frame
17:14 Size of rotating portion of stack frame
(the number of rotating registers is 8 * sor)
24:18 Register Rename Base for general registers
31:25 Register Rename Base for floating-point registers
37:32 Register Rename Base for predicate registers
"IA-32 Instruction Pointer" on
1:75.
18 17 14 13
rrb.gr sor
7 4
Description
"Instruction
Table 3-2.
7 6
sol sof
7 7
1:27
0