I
Part I—Overview
1
Overview
2
G2_LE Core
3
Memory Map
II
1
Part II—Configuration and Reset
4
System Interface Unit (SIU)
5
Reset
III
Part III—The Hardware Interface
6
External Signals
7
60x Signals
8
The 60x Bus
9
PCI Bridge
10
Clocks and Power Control
11
Memory Controller
12
Secondary (L2) Cache Support
13
IEEE 1149.1 Test Access Port
Freescale Semiconductor, Inc.
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