Sign In
Upload
Manuals
Brands
ARM Manuals
Controller
Cortex -A9
ARM Cortex -A9 Embedded Processor Manuals
Manuals and User Guides for ARM Cortex -A9 Embedded Processor. We have
1
ARM Cortex -A9 Embedded Processor manual available for free PDF download: Technical Reference Manual
ARM Cortex -A9 Technical Reference Manual (72 pages)
Brand:
ARM
| Category:
Controller
| Size: 0.51 MB
Table of Contents
Change History
2
Table of Contents
5
Preface
11
About this Book
12
Key to Timing Diagram Conventions
14
Feedback
16
Chapter 1 Introduction
17
About the MBIST Controller
18
Figure 1-1 Cortex-A9 MBIST Configuration
18
MBIST Controller Interface
19
Figure 1-2 MBIST Controller Wiring Diagram
19
Figure 1-3 Traditional Method of Interfacing MBIST
20
Figure 1-4 Cortex-A9 Processor MBIST Interface
21
Table 1-1 Cortex-A9 Processor MBIST Interface Signals
22
Product Revisions
23
Chapter 2 Functional Description
25
Functional Overview
26
Table 2-1 Cortex-A9 Signal Settings for MBIST
26
Table 2-2 RAM Arrays and MBIST Controller Interfaces
26
Table 2-3 Data Data RAM Byte Write Enable Control
29
Figure 2-1 Data in for Instruction Data RAM and Data Data RAM
29
Figure 2-2 Data out for Instruction Data RAM and Data Data RAM
29
Table 2-4 MBISTARRAY Bit Usage for Tag Rams
30
Figure 2-3 Data in for Instruction Tag RAM
30
Figure 2-4 Data out for Instruction Tag RAM
31
Figure 2-5 Data in for Data Tag RAM and SCU Tag RAM
31
Figure 2-6 Data out for Data Tag RAM and SCU Tag RAM
31
Table 2-5 Tag RAM Control
32
Figure 2-7 Data in for Outer RAM
32
Figure 2-8 Data out for Outer RAM
32
Figure 2-9 Data in for BTAC RAM
33
Figure 2-10 Data out for BTAC RAM
33
Figure 2-11 Data in for TLB RAM
33
Figure 2-12 Data out for TLB RAM
34
Figure 2-13 Data in for GHB RAM
34
Table 2-6 MBISTTX Signals
35
Figure 2-14 MBIST Controller Block
35
Table 2-7 MBISTRX Signals
36
Table 2-8 MBIST Controller Top Level I/O
37
Functional Operation
39
Figure 2-15 Loading the MBIST Controller Instruction
39
Figure 2-16 Starting the MBIST Test
40
Figure 2-17 Detecting an MBIST Failure
40
Figure 2-18 Start of Data Log Retrieval
41
Figure 2-19 End of Data Log Retrieval
41
Table 2-9 Data Log Format
42
Figure 2-20 Start of Bitmap Data Log Retrieval
42
Figure 2-21 End of Bitmap Data Log Retrieval
43
Chapter 3 MBIST Instruction Register
45
About the MBIST Instruction Register
46
Figure 3-1 MBIST Instruction Register Control Unit
46
Figure 3-2 MBIST Instruction Register Dispatch Unit
46
Field Descriptions
48
Table 3-1 Pattern Field Encoding
48
Table 3-2 Go/No-Go Test Pattern
50
Table 3-3 Control Field Encoding (Five LSB Bits)
51
Table 3-4 Read Latency Field Encoding
52
Table 3-5 Write Latency Field Encoding
52
Table 3-6 MBIR[39:36] CPU Mapping
53
Table 3-7 Maxxaddr Field Encoding
54
Table 3-8 Maxyaddr Field Encoding
54
Table 3-9 Arrayenables Field Encoding
55
Table 3-10 Columnwidth Field Encoding
57
Table 3-11 Cachesize Field Encoding
57
Chapter 4 MBIST Datalog Register
59
About the MBIST Datalog Register
60
Figure 4-1 MBIST Datalog Register Format
60
Field Descriptions
61
Table A-1 MBIST Controller Interface Signals
64
Table A-2 MBISTARRAY One-Hot Chip Enables
64
Table A-3 Miscellaneous Signals
66
Table B-1 Differences between Issue a and Issue B
67
Table B-2 Differences between Issue B and Issue C
67
Advertisement
Advertisement
Related Products
ARM Cortex-A9 MBIST
ARM Cortex-M3 DesignStart
ARM Cortex-A53 MPCore
ARM Cortex-R4
ARM Cortex-R4F
ARM Cortex-M4
ARM Cortex-A8 MID
ARM Cortex-M0
ARM Cortex-A76 Core
ARM Cortex-A35
ARM Categories
Computer Hardware
Motherboard
Controller
Computer Accessories
Processor
More ARM Manuals
Login
Sign In
OR
Sign in with Facebook
Sign in with Google
Upload manual
Upload from disk
Upload from URL