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2.6
Instruction Set
2.6.1
Overview
The H8S/2000 CPU has 65 types of instructions. The instructions are classified by function in
table 2.1.
Table 2.1
Instruction Classification
Function
Data transfer
Arithmetic
Logic operations
Shift
Bit manipulation
Branch
System control
Block data transfer
Notes: B: byte size; W: word size; L: longword size.
1. POP.W Rn and PUSH.W Rn are identical to MOV.W @SP+, Rn and MOV.W Rn, @-
SP.
POP.L ERn and PUSH.L ERn are identical to MOV.L @SP+, ERn and MOV.L ERn, @-
SP.
2. Bcc is the general name for conditional branch instructions.
Instructions
MOV
*1
*1
POP
, PUSH
LDM, STM
MOVFPE, MOVTPE
ADD, SUB, CMP, NEG
ADDX, SUBX, DAA, DAS
INC, DEC
ADDS, SUBS
MULXU, DIVXU, MULXS, DIVXS
EXTU, EXTS
TAS
AND, OR, XOR, NOT
SHAL, SHAR, SHLL, SHLR, ROTL, ROTR,
ROTXL, ROTXR
RSET, BCLR, BNOT, BTST, BLD, BILD, BST,
BIST, BAND, BIAND, BOR, BIOR, BXOR, BIXOR
*2
Bcc
, JMP, BSR, JSR, RTS
TRAPA, RTE, SLEEP, LDC, STC, ANDC, ORC,
XORC, NOP
EEPMOV
Size
BWL
WL
L
B
BWL
B
BWL
L
BW
WL
B
BWL
BWL
B
Total: 65 types
Rev. 1.0, 02/00, page 33 of 1141
Types
5
19
4
8
14
5
9
1
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