Instructions And Addressing Modes - Hitachi H8S/2199 Hardware Manual

Single-chip microcomputer
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2.6.2

Instructions and Addressing Modes

Table 2.2 indicates the combinations of instructions and addressing modes that the H8S/2000 CPU
can use.
Table 2.2
Combinations of Instructions and Addressing Modes
Instruction
MOV
BWL
POP, PUSH
LDM, STM
MOVFPE,
MOVTPE*
ADD, CMP
BWL
SUB
WL
ADDX, SUBX
ADDS, SUBS
INC, DEC
DAA, DAS
MULXU,
DIVXU
MULXS,
DIVXS
NEG
EXTU, EXTS
TAS
AND, OR,
BWL
XOR
NOT
Shift
Bit manipulation
Bcc, BSR
Branch
JMP, JSR
RTS
TRAPA
RTE
SLEEP
LDC
STC
ANDC,
ORC, XORC
NOP
Block data transfer
[Legend]
B:
Byte
W:
Work
L:
Longword
Note: * Cannot be used in this LSI.
Rev. 1.0, 02/00, page 34 of 1141
BWL
BWL
BWL
BWL
BWL
B
B
L
BWL
B
BW
BW
BWL
WL
B
BWL
BWL
BWL
B
B
B
B
W
W
B
W
W
B
Addressing Modes
BWL
BWL
B
BWL
B
B
B
W
W
W
W
W
W
BWL
B
W
W
WL
L
BW

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