Hitachi H8S/2199 Hardware Manual page 63

Single-chip microcomputer
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Table 2.9
System Control Instructions
Instruction
Size*
TRAPA
RTE
SLEEP
LDC
B/W
STC
B/W
ANDC
B
ORC
B
XORC
B
NOP
Note: * Size refers to the operand size.
B:
Byte
W: Word
Function
Starts trap-instruction exception handling
Returns from an exception-handling routine
Causes a transition to a power-down state
(EAs) → CCR, (EAs) → EXR
Moves contents of a general register or memory or immediate
data to CCR or EXR. Although CCR and EXR are 8-bit
registers, word-size transfers are performed between them and
memory. The upper 8 bits are valid
CCR → (EAd), EXR → (EAd)
Transfers CCR or EXR contents to a general register or memory.
Although CCR and EXR are 8-bit registers, word-size transfers
are performed between them and memory. The upper 8 bits are
valid
CCR ∧ #IMM → CCR, EXR ∧ #IMM → EXR
Logically ANDs the CCR or EXR contents with immediate data
CCR∨ #IMM → CCR, EXR∨ #IMM → EXR
Logically ORs the CCR or EXR contents with immediate data
CCR ⊕ #IMM → CCR, EXR ⊕ #IMM → EXR
Logically exclusive-ORs the CCR or EXR contents with
immediate data
PC + 2 → PC
Only increments the program counter
Rev. 1.0, 02/00, page 43 of 1141

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