Companion Chip Interface; Bit Pc Card I/O 16-Bit Access To 8-Bit Device - Intel PXA255 Developer's Manual

Memory Controller
Figure 6-30. 16-Bit PC Card I/O 16-Bit Access to 8-Bit Device
MA[25:1],nPREG,PSKTSEL
nPIOW,nPIOR
The interface waits the smallest possible amount of time (x_ASST_WAIT) before it checks the
value of the nPWAIT signal. If the nPWAIT signal is asserted (active low), the interface continues
to wait (for a variable number of wait states) until nPWAIT is deasserted. When the nPWAIT signal
is deasserted, the command continues to be asserted for a fixed amount of time (x_ASST_HOLD).
6.9

Companion Chip Interface

The processor can be connected to a companion chip in two different ways:
•
Alternate Bus Master Mode
•
Variable Latency I/O (See
The connection methods are illustrated in
6-70
0ns
MEMCLK
MA[0]
nPCE2
nPCE1
IOx_SET
RDnWR
nIOIS16
nPWAIT
read_data
write_data
Section
100ns
IOx_SET
IOx_HOLD
IOx_ASST_HOLD
IOx_ASST_WAIT + wait states
Low Byte
6.7.6)
Figure 6-31 and Figure
Intel® PXA255 Processor Developer's Manual
200ns
IOx_HOLD
IOx_ASST_HOLD
IOx_ASST_WAIT + wait states
High Byte
6-32.
300ns