Table 5-8 Reset Boot-Up Behavior - ARM Cortex-M3 Technical Reference Manual

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Exceptions
5.9.2
Intended boot up sequence
Action
Initialize variables
[Setup stacks]
Initialize any runtime
[Initialize any peripherals]
[Switch ISR vector table]
[Setup Configurable Faults]
Setup interrupts
5-20
0,
// Populate if using Bus fault
0,
// Populate if using Usage Fault
0, 0, 0, 0, // reserved slots
SVCallISR,
0,
// Populate if using a debug monitor
0,
// Reserved
0,
// Populate if using pendable service request
0,
// Populate if using SysTick
// external interrupts start here
Timer1ISR,
GpioInISR
GpioOutISR,
I2CIsr
};
A normal reset routine follows the steps shown in Table 5-8. A C/C++ runtime may
perform the first three steps and then call
Description
Any global/static variables must be setup. This includes zeroing out BSS (initialized
variables), and copying initial values from ROM to RAM for non-constant variables.
If more than one stack will be used, the other banked SPs must be initialized. The current
SP may also be changed to Process from Main.
Optionally make calls to C/C++ runtime init code to allow use of heap, floating point, or
other features. This is normally done by
Setup peripherals before interrupts are enabled. This can call to setup each peripheral to be
used in the application.
Optionally change vector table from Code area, @0, to a location in SRAM. This is only
done to optimize performance or allow dynamic changes.
Enable Configurable faults and set their priorities.
Setup priority levels and masks.
Copyright © 2005, 2006 ARM Limited. All rights reserved.
.
main()

Table 5-8 Reset boot-up behavior

from the C/C++ library.
__main
ARM DDI 0337B

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