Figure 305. Bus Transfer Diagrams For Smbus Master Receiver - STMicroelectronics STM32WL5 Series Reference Manual

RM0453
Example SMBus master receiver 2 bytes + PEC, automatic end mode (STOP)
NBYTES
INIT: program Slave address, program NBYTES = 3, AUTOEND=1, set PECBYTE, set START
EV1: RXNE ISR: rd data1
EV2: RXNE ISR: rd data2
EV3: RXNE ISR: rd PEC
Example SMBus master receiver 2 bytes + PEC, software end mode (RESTART)
INIT
NBYTES
xx
INIT: program Slave address, program NBYTES = 3, AUTOEND=0, set PECBYTE, set START
EV1: RXNE ISR: rd data1
EV2: RXNE ISR: rd data2
EV3: RXNE ISR: read PEC
EV4: TC ISR: program Slave address, program NBYTES = N, set START
34.4.15 Wake-up from Stop mode on address match
This section is relevant only when wake-up from Stop mode feature is supported (refer to
Section 34.3).
The I2C is able to wake-up the MCU from Stop mode (APB clock is off), when it is
addressed. All addressing modes are supported.
Wake-up from Stop mode is enabled by setting the WUPEN bit in the I2C_CR1 register. The
HSI16 oscillator must be selected as the clock source for I2CCLK in order to allow wake-up
from Stop mode.
During Stop mode, the HSI16 is switched off. When a START is detected, the I2C interface
switches the HSI16 on, and stretches SCL low until HSI16 is woken up.
HSI16 is then used for the address reception.

Figure 305. Bus transfer diagrams for SMBus master receiver

data1
S Address A
INIT
xx 3
RXNE
data1
S Address A A
EV1
3
Inter-integrated circuit (I2C) interface
RXNE RXNE
PEC
data2
A A
E V 1 EV2
RXNE RXNE
data2
A PEC NA
EV2 EV3
RM0453 Rev 5
RXNE
legend:
NA P
E V 3
legend:
TC
Restart
Address
EV4
N
transmission
reception
SCL stretch
transmission
reception
SCL stretch
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