Clock Package Length Table; Clock Routing Example; Table 25. Memory Clock Package Lengths - Intel 855GM Design Manual

System Memory Design Guidelines (DDR-SDRAM) for SO-DIMM configuration
6.3.3.3.

Clock Package Length Table

The package length data in the table below should be used to tune the motherboard length of each
SCK/SCK# clock pair between the GMCH and the associated SO-DIMM socket. It is recommended
that die-pad to SO-DIMM pin length be tuned to within ± 25 mils in order to optimize timing margins
on the interface.

Table 25. Memory Clock Package Lengths

Signal
SCK_0
SCK#_0
SCK_1
SCK#_1
SCK_2
SCK#_2
SCK_3
SCK#_3
SCK_4
SCK#_4
SCK_5
SCK#_5
Package length compensation can be performed on each individual clock output thereby matching total
length on SCK/SCK# exactly, or alternatively the average package length can be used for both outputs
of a pair and length tuning done with respect to the motherboard portion only.
6.3.3.4.

Clock Routing Example

Figure 35 is an example of a board routing for the clock signal group.
82
Package Length
Pin Number
(mils)
AB2 1177
AA2 1169
AC26
AB25
AC3 1129
AD4 1107
AC2 1299
AD2 1305
AB23
AB24
AA3 1128
AB4 1146
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Intel
840
838
643
656
855GM/855GME Chipset Platform Design Guide
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