Samsung S5PC100 User Manual page 493

NAND FLASH CONTROLLER
7.20 ECC0/1/2 FOR 8BIT ECC STATUS REGISTER (NFECCERR1, R, ADDRESS = 0XE720_004C)
NFECCERR1
MLCErrLocation8
Reserved
MLCErrLocation7
Reserved
MLCErrLocation6
NOTE: These values are updated if ECCDecodeDone (NFSTAT[6]) is set ('1').
5.4-28
Bit
[31:22]
Error byte location of 8
[21] Reserved
[20:11] Error byte location of 7
[10] Reserved
[9:0]
Error byte location of 6
S5PC100 USER'S MANUAL (REV1.0)
Description
th
bit error
th
bit error
th
bit error
Reset Value
0x000
0
0x000
0
0x000