Samsung S5PC100 User Manual page 759

S5PC100 USER'S MANUAL (REV1.0)
1.2.2 MIPI DSI Master & D-PHY I/F Block Diagram
RGB I/F
I80 I/F
Slave I/F
MIPI
DSI
Protocol
Layer
Figure 8.7-2 PPI I/F Block Diagram
RMS[19:0]
EscRef
ByteCLK/8
BandCtrl[3:0]
TxByteClkHS
TxRequestHSClk
TxReadyHSClk
TxClkEscClk
TxUlpsClk
TxUlpsExitClk
UlpsAcitveNotClk
StopstateClk
EnableClk
TxByteClkHS
TxRequestHS
TxReadyHS
TxClkEsc
TxRequestEsc
TxLpdtEsc
TxUlpsEsc
TxUlpsExitEsc
TxValidEsc
TxReadyEsc
TxTriggerEsc[3:0]
TxDataHS/LP[7:0]
RxClkEsc
RxLpdtEsc
RxUlpsEsc
RxTriggerEsc[3:0]
RxValidEsc
RxDataEsc[7:0]
TurnRequest
Direction
ForceTxStopmode
UlpsAcitveNot
Stopstate
Enable
ErrEsc
ErrSyncEsc
ErrControl
ErrContentionLP0
ErrContentionLP1
MIPI DSIM
D-PHY
EXTCLK
PLL
BitClkHS
Dp
Clock
Dn
Lane
D-PHY
Layer
Dp
Dn
Dp
Data Dn
Lane
Dp
Dn
Dp
Dn
8.7-3