Samsung S5PC100 User Manual page 323

S5PC100 USER'S MANUAL (REV1.0)
Although Coresight's registers can be accessed through system APB bus as well as JTAG port, the
address map of those registers are observed differently. While the memory map for JTAG port is same as
shown in Figure 3.2-2, the memory map for system view is same as the memory map for JTAG port +
system register offset. The debugger register map of S5PC100 is summarized in Figure 3.2-3.
The more detail information of debugger register will be handled in programmers model part.
Figure 3.2-3 Debugger Register Map of S5PC100
NOTE
CORESIGHT
3.2-5