Samsung S5PC100 User Manual page 105

S5PC100 USER'S MANUAL (REV1.0)
Reserved
5.4.7 Port Group ETC3 Pull-up/down Register (ETC3PUD, R/W, Address = 0xE030_0548)
00 = Disables Pull-up/down, 01 = Enables Pull-down, 10 = Enables Pull-up
Field
ETC3PUD[0]
ETC3PUD[1]
ETC3PUD[2]
ETC3PUD[3]
ETC3PUD[4]
ETC3PUD[5]
ETC3PUD[6]
5.4.8 Port Group ETC3 Drive Strength Control Register (ETC3DRV, R/W, Address = 0xE030_054C)
00=1x, 01=2x, 10=3x, 11=4x.
Field
ETC3DRV[0]
ETC3DRV[1]
ETC3DRV[2]
ETC3DRV[3]
ETC3DRV[4]
ETC3DRV[5]
ETC3DRV[6]
5.4.9 Port Group ETC4 Drive strength control Register (ETC4DRV, R/W, Address = 0xE030_056C)
00=1x, 01=2x, 10=3x, 11=4x.
Field
ETC4DRV[0]
Reserved
ETC4DRV[2]
Reserved
ETC4DRV[4]
ETC4DRV[5]
Reserved
[7:6] Reserved
Bit
[1:0] XI2S0LRCK pin Pull-down control register
[3:2] XI2S0CDCLK pin Pull-down control register
[5:4] XI2S0SCLK pin Pull-down control register
[7:6] XI2S0SDI pin Pull-down control register
[9:8] XI2S0SDO[0] pin Pull-down control register
[11:10] XI2S0SDO[1] pin Pull-down control register
[13:12] XI2S0SDO[2] pin Pull-down control register
Bit
[1:0] XI2S0LRCK pin Drive strength control register
[3:2] XI2S0CDCLK pin Drive strength control register
[5:4] XI2S0SCLK pin Drive strength control register
[7:6] XI2S0SDI pin Drive strength control register
[9:8] XI2S0SDO[0] pin Drive strength control register
[11:10] XI2S0SDO[1] pin Drive strength control register
[13:12] XI2S0SDO[2] pin Drive strength control register
Bit
[1:0] X27mXTI/X27mXTo pin Drive strength control register
[3:2] Reserved
[5:4] XXTI/XXTO pin Drive strength control register
[7:6] Reserved
[9:8] XusbXTI/XusbXTO pin Drive strength control register
XrtcXTI/XrtcXTO pin Drive strength control register
[10]
0 = 1x, 1 = 2x
[13:11] Reserved
Description
Description
Description
PAD CONTRL
0x0
Reset Value
0x0
0x0
0x0
0x1
0x0
0x0
0x0
Reset Value
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Reset Value
0x0
0x0
0x0
0x0
0x0
0x0
0x0
2.2-53