Samsung S5PC100 User Manual page 684

S5PC100 USER'S MANUAL (REV1.0)
Figure 8.4-3 shows FIR demodulation state machine. The state machine starts if ACR register bit 6 is set to logic
high. The incoming data is depacketized by removing preamble and start flag and stop flag.
4PPM decoding and CRC decoding is also carried out.
Rx
Enable
0
ena & prebyte
Preamble
& start flag
Detect
1
str_end
Pay Load
Detect
& 4ppm decod
2
crc_decod_start
Pay Load
Detect &
CRC check
3
pay_end = last_byte
CRC
Decoding
for syndrom
4
stp_start
Stop
Flag
Detect
5
stp_end & ena
stp_end & ~ena
Figure 8.4-3 FIR Demodulation Process
~(ena & prebyte)
phy_err
IRDA
8.4-5