Samsung S5PC100 User Manual page 843

S5PC100 USER'S MANUAL (REV1.0)
UHCRHPSTAT2
CCS
Bit
This change also causes the port enabled status
change bit (UHCRHPS1/2/3[PESC] to be set. The HCD
sets the PortEnableStatus bit, by writing a 1 to it, and
clears this bit by writing a 1 to clear port enable
(UHCRHPS1/2/3[CCS], bit 0 of this register). If
CurrentConnectStatus is cleared, this write does not set
PortEnableStatus, but instead sets
ConnectStatusChange. This informs the driver that it
attempted to enable a disconnected port. Writing a 0 to
the PortEnableStatus bit has no effect. This bit is also
set, if not already, at the completion of a port reset if
reset status change (UHCRHPS1/2/3[PRSC]) is set or
port suspend if suspend status change
(UHCRHPS1/2/3[PSSC]) is set
0 = Port is disabled.
1 = Port is enabled.
[0] (read) CurrentConnectStatus / (write) ClearPortEnable
This bit reflects the current state of the downstream
port. If a device is connected, this bit reads as 1, and if
no device is connected, it is 0. The HCD writes a 1 to
this bit to clear the PortEnableStatus bit. Writing a 0 has
no effect. The CurrentConnectStatus is not affected by
any write.
NOTE: This bit is always read as 1 when the attached
device is nonremovable This bit reflects the current
state of the downstream port.
0 = No device connected.
1 = Device connected.
Description
USB HOST CONTROLLER
R/W Reset Value
R/W
8.9-43