Samsung S5PC100 User Manual page 628

UART
UART A
3.4 EXAMPLE OF NON AUTO-FLOW CONTROL (CONTROLLING NRTS AND NCTS BY SOFTWARE)
3.4.1 Rx operation with FIFO
1. Select transmit mode (Interrupt or DMA mode).
2. Check the value of Rx FIFO count in UFSTATn register. If the value is less than 16, you must set the value of
UMCONn[0] to '1' (activate nRTS), and if it is equal or larger than 16 you must set the value to '0' (inactivate
nRTS).
3. Repeat the Step 2.
3.4.2 Tx operation with FIFO
1. Select transmit mode (Interrupt or DMA mode).
2. Check the value of UMSTATn[0]. If the value is '1' (activate nCTS), you must write the data to Tx FIFO
register.
3. Repeat the Step 2
3.5 RS-232C INTERFACE
To connect the UART to modem interface (instead of null modem), nRTS, nCTS, nDSR, nDTR, DCD and nRI
signals are required. In this case, you can control these signals with general I/O ports by software because the
AFC does not support the RS-232C interface.
3.6 INTERRUPT/DMA REQUEST GENERATION
Each UART of the S5PC100 has seven status (Tx/Rx/Error) signals, namely: Overrun error, Parity error, Frame
error, Break, Receive buffer data ready, Transmit buffer empty, and Transmit shifter empty. These conditions are
indicated by the corresponding UART status register (UTRSTATn/UERSTATn).
The Overrun Error, Parity Error, Frame Error and Break Condition are referred as the receive error status. If
receive-error-status-interrupt-enable bit is set to 1 in the control register, UCONn, receive error status generates
receive-error-status-interrupt. If a receive-error-status-interrupt-request is detected, you can identify the source of
interrupt by reading the value of UERSTSTn.
If the receiver transfers the data of the receive shifter to the receive FIFO register in FIFO mode and the number
of received data reaches Rx FIFO Trigger Level, Rx interrupt is generated, if Receive mode in control register
(UCONn) is set to 1 (Interrupt request or polling mode).
In Non-FIFO mode, transferring the data of receive shifter to receive holding register causes Rx interrupt under
the Interrupt request and polling mode.
8.1-4
Transmission case in
UART A
UART B
TxD RxD
nCTS nRTS
Figure 8.1-2 UART AFC interface
S5PC100 USER'S MANUAL (REV1.0)
Reception case in
UART A
UART A UART B
RxD TxD
nRTS nCTS