Samsung S5PC100 User Manual page 123

S5PC100 USER'S MANUAL (REV1.0)
NWU_INT19[5]
FLTEN19[4]
NWU_INT19[4]
5.5.60 Non wake-up Interrupt 20 Filter Configuration Register 0 (NWU_INT20_FLTCON0, R/W, Address =
0xE030_08A0) The Digital Filter Enable field means that 0 = disables, 1 = enables.
Field
FLTEN20[3]
NWU_INT20[3]
FLTEN20[2]
NWU_INT20[2]
FLTEN20[1]
NWU_INT20[1]
FLTEN20[0]
NWU_INT20[0]
5.5.61 Non wake-up Interrupt 0 Mask Register (NWU_INT0_MASK, R/W, Address = 0xE030_0900)
Field
Reserved
NWU_INT0_MASK[n]
5.5.62 Non wake-up Interrupt 1 Mask Register (NWU_INT1_MASK, R/W, Address = 0xE030_0904)
Field
Reserved
NWU_INT1_MASK[n]
5.5.63 Non wake-up Interrupt 2 Mask Register (NWU_INT2_MASK, R/W, Address = 0xE030_0908)
Field
Reserved
NWU_INT2_MASK[n]
5.5.64 Non wake-up Interrupt 3 Mask Register (NWU_INT3_MASK, R/W, Address = 0xE030_090C)
Field
Reserved
NWU_INT3_MASK[n]
[14:8] Filtering width for NWU_INT19[5]
[7] Digital Filter Enable for NWU_INT19[4]
[6:0] Filtering width for NWU_INT19[4]
Bit
[31] Digital Filter Enable for NWU_INT20[3]
[30:24] Filtering width for NWU_INT20[3]
[23] Digital Filter Enable for NWU_INT20[2]
[22:16] Filtering width for NWU_INT20[2]
[15] Digital Filter Enable for NWU_INT20[1]
[14:8] Filtering width for NWU_INT20[1]
[7] Digital Filter Enable for NWU_INT20[0]
[6:0] Filtering width for NWU_INT20[0]
Bit
[31:8] Reserved
[n] 0 = Enabled, 1 = Masked (n=0,..,7)
Bit
[31:5] Reserved
[n] 0 = Enabled, 1 = Masked (n=0,..,4)
Bit
[31:8] Reserved
[n] 0 = Enabled, 1 = Masked (n=0,..,7)
Bit
[31:5] Reserved
[n] 0 = Enabled, 1 = Masked (n=0,..,4)
Description
Description
Description
Description
Description
PAD CONTRL
000
0
000
Reset Value
0
000
0
000
0
000
0
000
Reset Value
0
1
Reset Value
0
1
Reset Value
0
1
Reset Value
0
1
2.2-71