Samsung S5PC100 User Manual page 475

NAND FLASH CONTROLLER
5.6 4-BIT ECC PROGRAMMING GUIDE (DECODING)
1. To use 4-bit ECC in software mode, set the MsgLength to 0 (512-byte message length) and set the ECCType
to "10" (enable 4bit ECC). ECC module generates ECC parity code for 512-byte read data. Therefore write
the InitMECC (NFCONT[5]) bit as '1' to reset ECC value and clear the MainECCLock (NFCONT[7]) bit to
'0'(Unlock) before read data.
MainECCLock (NFCONT[7]) bit controls the generation of ECC parity code
2. The 4-bit ECC modules generates ECC parity code internally whenever data is read.
3. After 512-byte (does not include spare area data) is read, you must read parity codes. MLC ECC module
needs parity codes to detect whether error bits are or not. Therefore read ECC parity code right after read
512-byte. Once ECC parity code is read, 4-bit ECC engine starts to search any error internally. 4-bit ECC
error searching engine need minimum 155 cycles to find any error. During this time, continue read main data
from external NAND Flash memory. ECCDecDone(NFSTAT[6]) is used to check whether ECC decoding is
complete.
4. If ECCDecDone (NFSTAT[6]) is set ('1'), NFECCERR0 indicates whether error bit exist or not. If any error
exists, fix it by referring NFECCERR0/1 and NFMLCBITPT register.
5. If there is more main data to be read, continue from step 1 for remaining data.
6. For meta data error check, set the MsgLength to 1(24-byte message length) and set the ECCType to '1'
(enable 4-bit ECC). ECC module generates ECC parity code for 512-byte read data. Therefore reset ECC
value by writing the InitMECC (NFCONT[5]) bit as '1' and clear the MainECCLock (NFCONT[7]) bit to
'0'(Unlock) before read data.
MainECCLock (NFCONT[7]) bit controls the generation of ECC parity code.
7. The 4-bit ECC modules generates ECC parity code internally whenever data is read.
8. After 512-byte (not include spare area data) is read, you must read parity codes. 4-bit ECC module needs
parity codes to detect whether error bits are or not. Therefore read ECC parity codes right after read 512-byte.
Once ECC parity code is read, 4-bit ECC engine starts to search any error internally. 4-bit ECC error
searching engine need minimum 155 cycles to find any error. During this time, continue read main data from
external NAND Flash memory. The ECCDecDone(NFSTAT[6]) is used to check whether ECC decoding is
complete.
9. If ECCDecDone (NFSTAT[6]) is set ('1'), NFECCERR0 indicates whether error bit exist or not. If any error
exists, fix it by referring NFECCERR0/1 and NFMLCBITPT register.
5.4-10
S5PC100 USER'S MANUAL (REV1.0)