Samsung S5PC100 User Manual page 266

S5PC100 USER'S MANUAL (REV1.0)
10.5.12 IEM_CONTROL Registerbn (IEM_CONTROL, R/W, Address = 0xE010_8620)
The register controls IEM global function.
IEM_CONTROL
Reserved
Reserved
Reserved
iem_prev_target
Reserved
Reserved
Reserved
Iem_max_perf_con
Reserved
Reserved
Reserved
iem_enable
10.5.13 CLKDIV_IEM_L8 Register (CLKDIV_IEM_L8, R/W, Address = 0xE010_8700)
The register configures clock divider values for ARM and HPM clocks at IEM performance level of 8.
CLKDIV_IEM_L8
Reserved
Reserved
pll_div_val_l8
Reserved
hpm_div_val_l8
Bit
[31:28] Reserved
[27:26] Reserved
[25:24] DO NOT CHANGE
IEM previous target performance level setting. You can set
[23:16] one of the following values: 0x01, 0x03, 0x07, 0x0f, 0x1f,
0x3f, 0x7f and 0xff
[15:14] Reserved
[13:12] DO NOT CHANGE
[11:9] DO NOT CHANGE
This register value is transferred as IEC_MAXPERF signal to
IEM_IEC module. You should not set this register to 1'b1 if
iem_enable field (below) = 1'b0.
[8]
0 = Set IEC_MAXPERF to 1'b0
1 = Set IEC_MAXPERF to 1'b1
[7:4] Reserved
[3] Reserved
[2:1] DO NOT CHANGE
IEM function enable bit
[0]
0 = Disables IEM function ,
Bit
[31:16] DO NOT CHANGE
[15:13] DO NOT CHANGE
This field is used to set dividing value in both DIV
DIV
APLL_HPM.
DIV clock divider ratio, DOUT
APLL
[12] (RATIO = pll_div_val_l8 + 1), and
DIV clock divider ratio, DOUT
APLL_HPM
RATIO (RATIO = pll_div_val_l8 + 1) at IEM performance level
of 8
[11] DO NOT CHANGE
This field is used only in closed-loop mode (by using HPM).
DIV clock divider ratio, SCLK_HPM = DOUT
HPM
[10:8]
RATIO (RATIO = hpm_div_val_l8 + 1) at IEM performance
level of 8
Description
1 = Enables IEM function
Description
= MOUT
APLL APLL
= MOUT
APLL_HPM
Power Management
Reset Value
0x0
00
00
0x00
00
00
000
0x0
0x0
00
Reset Value
0x0000
000
and
APLL
/ RATIO
/
APLL
/
ARM_HPM
000
0
0
0
0
2.4-67