Samsung S5PC100 User Manual page 240

S5PC100 USER'S MANUAL (REV1.0)
8.3 STOP MODE WAKEUP
Figure 2.4-12 shows wakeup timing from STOP mode.
When wakeup source is asserted, ARMCLK is supplied for ARM CPU within some interval (refer to comment on
Figure 2.4-12). ARMCLK is the same as those before STOP mode. After ARMCLK is supplied, CPU operation
begins normally.
XXTI
STOP _ MODE
( internal )
XEINT [0 ]
( wakup event )
ARMCLK _ OFF
(internal )
ARMCLK
( internal )
APLL clock out
APLL / MPLL /
HPLL / EPLL
( internal )
Note 1. oscillator stabilization time (Note 2 ) + APLL locking time
Note 2. oscillator stabilization time
1 ) OSC _ EN _ STOP = 1 'b 1, XXTI 30 cycles .
2 ) OSC _ EN _ STOP = 1 'b 0, this interval is determined by OSC
. . .
Enabled by H / W
automatically
Figure 2.4-12 STOP Mode Wakeup Timing
ARMCLK is the same as those
before STOP mode
Note 1
. . .
Note 2
PLL locking time ( 300 us )
_ STABLE register .
Power Management
.
2.4-41