Samsung S5PC100 User Manual page 237

Power Management
8 WAKEUP TIMING DIAGRAM
In this section, wakeup timing diagrams from various power-down modes are described.
8.1 IDLE MODE WAKEUP
Figure 2.4-9 shows wakeup timing from IDLE mode.
In IDLE mode, ARMCLK is disabled for reducing dynamic power in ARM CPU. When wakeup event is asserted,
ARMCLK_OFF signal is released and then ARMCLK is supplied for ARM CPU within XXTI 6 cycles. After
ARMCLK is supplied, CPU operation begins normally.
XXTI
IDLE _ MODE
( internal )
XEINT [0 ]
( wakup event )
ARMCLK _ OFF
(internal )
ARMCLK
( internal )
APLL clock out
APLL /MPLL /
HPLL / EPLL
(internal )
2.4-38
. . .
Figure 2.4-9 IDLE Mode Wakeup Timing
S5PC100 USER'S MANUAL (REV1.0)
ARMCLK is the same as those
before IDLE mode (APLL clock out ).
XXTI 6 cycles