S5PC100 USER'S MANUAL (REV1.0)
3.2 DETAILED DESCRIPTION
3.2.1
Channel Control Register for DMA_mem (CC, R)
•
CC_0, R, Address = 0xE810_0408
•
CC_1, R, Address = 0xE810_0428
•
CC_2, R, Address = 0xE810_0448
•
CC_3, R, Address = 0xE810_0468
•
CC_4, R, Address = 0xE810_0488
•
CC_5, R, Address = 0xE810_04A8
•
CC_6, R, Address = 0xE810_04C8
•
CC_7, R, Address = 0xE810_04E8
CCn
dst_burst_size
src_burst_size
Bit
Programs the burst size that the DMAC uses when it writes the
destination data
b000 = 1 byte
[17:15]
b001 = 2 bytes
b010 = 4 bytes
b011 = 8 bytes
Other = Reserved
Programs the burst size that the DMAC uses when it reads the
source data
b000 = 1 byte
[3:1]
b001 = 2 bytes
b010 = 4 bytes
b011 = 8 bytes
Other = Reserved
Description
DMA CONTROLLER
Reset Value
0
0
6.1-17