Samsung S5PC100 User Manual page 453

ONENAND CONTROLLER
4.4 INTERRUPT ERROR STATUS REGISTER (INT_ERR_STAT, R/W, ADDRESS = 0XE710_0030)
INT_ERR_STAT
Reserved
Cache_Op_Err
Rst_Cmp
Reserved
INT_act
Unsup_Cmd
Locked_Blk
Blk_RW_Cmp
Ers_Cmp
Pgm_Cmp
Load_Cmp
Ers_Fail
Pgm_Fail
Int_T0
Ld_Fail_Ecc_Err
5.3-16
Bit
[31:14] Reserved
An error occurred during a cache read or write setup or
operation.
If the host does not send an appropriate sequence of MAP01
following a MAP10 pipeline command, then the controller
issues a Cache_Op_Err.
As an example, a MAP10 command is issued for an 8-way
[13]
interleaved read of 10 pages starting from address A. If the
next command is not a MAP01 command to the same
address, or if the order of MAP01 commands is inaccurate,
then the Controller issues this interrupt, send a core reset to
the device, clears all the pipeline registers and service the
request as a normal read. A similar example would hold for a
pipelined write command.
The controller has completed its reset and auto- initialization
[12] process. (After auto-initialize complete and available
OneNAND Device, this bit is "1")
[11] Reserved
[10] The memory device's INT pin is actively transitioning.
An unsupported command was received. This interrupt is set if
[9]
an invalid command is received, or if a command sequence is
broken.
[8] The address to program or erase is in a protected block.
This interrupt indicates one of the following have occurred:
- A copyback operation is complete.
- A pipeline transaction is complete.
[7]
- A lock, lock-tight or unlock command to a range of address
is complete.
- An Erase Verify operation is complete.
The erase operation is complete. This interrupt is
[6] automatically reset at the beginning of an erase operation.
Default is 0.
The program operation is complete. This interrupt is
[5] automatically reset at the beginning of a program operation.
Default is 0.
[4] The load operation is complete. Default is 0.
[3] The erase operation was unsuccessful.
[2] The program operation was unsuccessful.
[1] Interrupt time-out.
Dual purpose interrupt bit. The load operation was
[0]
unsuccessful or there was an ECC error.
S5PC100 USER'S MANUAL (REV1.0)
Description Reset Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0