Samsung S5PC100 User Manual page 31

BALL MAP & SIZE (POP)
1.3 POWER AND GROUND PIN ASSIGNMENT
Power
Pin Name
Group
VDDQ_A
MCP DDR
VDDQ_B
VDD_DRAM
VCCQ_O
MCP
OneNAND
VCC_O
VDDQ_DDR
VDDQ_M0
VDDQ_LCD
VDDQ_CI
VDDQ_MMC
VDDQ_AUD
Digital I/O
VDDQ_MSM
VDDQ_SYS0
VDDQ_SYS2
VDDQ_SYS5
VDDQ_CAN
VDDQ_EXT
VDDQ_UHOST
VDD_RTC
VDD_INT
Internal
Logic
VDD_ALIVE
VDD_ARM
Analog & VDD30_DAC_A
High Speed
VDD30_DAC_D
VDD12_HDMI
VDD18_MIPI
VDD12_MIPI
VDD18_MIPI_PL
VDD_APLL
1.1-6
TABLE 1.1-5 S5PC100 POWER PIN TO BALL ASSIGNMENT
R26, R27, W27, AC26, AD11, AD13, AE7,
A5, A12, A17, B5, B12, B17, G1, G2
A8, B25, E27, J1, M26, AE23, AF2, AG16
F8, H14, H15, H16, K15, L11, L13, L14, L15,
T12, U12, U13, U14, U15, V13, V14, Y12
F21, G20, G21, H18, H19, H20, H21, J20, J21,
K16, K17, K20, K21, L17, L18, L21, M18
L
Ball
AG4
P1, U1, U2
L1, AD2
G12, G13, H11, H12, H13
F7, G7, H6
M8, N6
L4
R7
U3
W6, Y6
L26
V12
V17
U18
M20, R21
Y16
V25
J26
AC1
AB7
Y10, AD7
Y15
AA13, AA14
Y13
AB17
S5PC100 USER'S MANUAL (REV1.0)
Description
OneDRAM A port I/O
OneDRAM B port and
mDDR I/O
OneDRAM and mDDR
core
OneNAND I/O
OneNAND core
DRAM I/O
EBI I/O
LCD I/O
CAMIF I/O
MMC2 I/O
Audio I/O
Host IF I/O
GPH, Main xtal I/O
X-tal I/O
Special clock I/O
CAN I/O
JTAG I/O, MMC I/O
USB Host I/O
RTC
Internal logic
Alive logic
Cortex-A8 core
DAC analog part
DAC digital part
HDMI Phy
MIPI
MIPI
MIPI
APLL