Samsung S5PC100 User Manual page 704

S5PC100 USER'S MANUAL (REV1.0) CCAN
4.1.8 Software control of pin CAN_TX
Four output functions are available for the CAN transmit pin CAN_TX. Additionally to its default function, the serial
data output, drives the CAN Sample Point signal to monitor CAN_Core's bit timing and drives constant dominant
or recessive values. The last two functions, combined with the readable CAN receive pin CAN_RX, are used to
check the CAN bus' physical layer.
The output mode of pin CAN_TX is selected by programming the Test Register bits Tx1 and Tx0.
The three test functions for pin CAN_TX interfere with all CAN protocol functions. CAN_TX must be left in its
default function if CAN message transfer or any of the test modes Loop Back Mode, Silent Mode, or Basic Mode
are selected.
4.2 APB INTERFACE
There are two interfaces to the AMBA APB.
With APB1 interface the block CCAN_GENERIC is clocked by the APB system clock PCLK. For the APB2
interface a clock divider is inserted between APB2 interface and CCAN_GENERIC. Please refer to "AMBA
Specification Rev. 2.0" for more details on the ARM AMBA bus.
The APB2 interface synchronizes write accesses from the PCLK domain to the CAN_CLK domain and read
accesses from the CAN_CLK domain to the PCLK domain. It is intended for cases where the C_CAN module is
connected to an AMBA APB bus which is clocked with a PCLK >> 8 MHz. To reduce the power consumption of
the module and to be able to generate the lower baud rates on the CAN bus a clock divider was inserted. The
DIV
clock divider can be set to values of 2 , where DIV is a positive value. For the actual version of the APB2
2
)
interface it is set to 4 (2
8.5-7