Samsung S5PC100 User Manual page 484

S5PC100 USER'S MANUAL (REV1.0)
7.7 MAIN DATA AREA ECC REGISTER (NFMECCD0, R/W, ADDRESS = 0XE720_0018)
NFMECCD1
ECCData3_1 [31:24]
ECCData3_0 [23:16]
(ECC3)
ECCData2_1
ECCData2_0
(ECC2)
NOTE: Only word access is valid.
7.8 SPARE AREA ECC REGISTER (NFSECCD, R/W, ADDRESS = 0XE720_001C)
NFSECCD
SECCData1_1
[31:24]
SECCData1_0
[23:16]
SECCData0_1
SECCData0_0
NOTE: Only word access is valid.
Bit
th
4 ECC for I/O[15:8]
th
4 ECC for I/O[ 7:0]
rd
[15:8]
3 ECC for I/O[15:8]
rd
[7:0]
3 ECC for I/O[ 7:0]
Bit
nd
2 ECC for I/O[15:8]
nd
2 ECC for I/O[ 7:0]
st
[15:8]
1 ECC for I/O[15:8]
st
[7:0]
1 ECC for I/O[ 7:0]
Description
Description
NAND FLASH CONTROLLER
Reset Value
0x00
0x00
0x00
0x00
Reset Value
0x00
0x00
0x00
0x00
5.4-19