Samsung S5PC100 User Manual page 58

PAD CONTROL
4.1 PIN SUMMARY
Type
A1 Control at power down mode is possible, power down mode is release by IO_RET_RELEASE[31]
A2 Control at power down mode is possible, power down mode is released automatically
B Alive I/O
C On power-down, they are set to be input without pull-up/down. On wakeup, they are set to the reset value
E1 The power-down state is "Previous State". On wakeup, S/W should release the power-down state
H High-Z
The values of the Pull & I/O column in the below table are the state at the reset. The meaning of the values of the
VDD column in the below table are described in the above table
Pad Name
XuRXD[0]
XuTXD[0]
XuCTSn[0]
XuRTSn[0]
XuRXD[1]
XuTXD[1]
XuCTSn[1]
XuRTSn[1]
XuRXD[2]
XuTXD[2]
XuRXD[3]
XuTXD[3]
XuCLK
XspiMISO[0]
XspiCLK[0]
XspiMOSI[0]
XspiCSn[0]
XspiMISO[1]
XspiCLK[1]
XspiMOSI[1]
XspiCSn[1]
XI2S1SCLK
XI2S1CDCLK
XI2S1LRCK
XI2S1SDI
XI2S1SDO
2.2-6
Function Singnals
GPA0[0]
GPA0[1]
GPA0[2]
GPA0[3]
GPA0[4]
GPA0[5]
GPA0[6]
GPA0[7]
GPA1[0]
GPA1[1]
GPA1[2] / UART3_RXD / UART2_CTSn / IrDA_RXD
GPA1[3] / UART3_TXD / UART2_RTSn / IrDA_TXD
GPA1[4] / UARTCLK / IrDA_SDBW
GPB[0]
GPB[1]
GPB[2]
GPB[3]
GPB[4]
GPB[5]
GPB[6]
GPB[7]
GPC[0] / I2S1_SCLK / PCM1_SCLK / AC97_BITCLK
GPC[1] / I2S1_CDCLK / PCM1_EXTCLK / AC97_RESETn
GPC[2] / I2S1_LRCK / PCM1_FSYNC / AC97_SYNC
GPC[3] / I2S1_SDI / PCM1_SIN / AC97_SDI
GPC[4] / I2S1_SDO / PCM1_SOUT / AC97_SDO
Function Description
/ UART0_RXD
/ UART0_TXD
/ UART0_CTSn
/ UART0_RTSn
/ UART1_RXD
/ UART1_TXD
/ UART1_CTSn
/ UART1_RTSn
/ UART2_RXD
/ UART2_TXD
/ SPI0_MISO
/ SPI0_CLK
/ SPI0_MOSI
/ SPI0_nCS
/ SPI1_MISO
/ SPI1_CLK
/ SPI1_MOSI
/ SPI1_nCS
S5PC100 USER'S MANUAL (REV1.0)
Pull I/O PDN
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
PD I A1
VDD
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_EXT
VDDQ_AUD
VDDQ_AUD
VDDQ_AUD
VDDQ_AUD
VDDQ_AUD