Samsung S5PC100 User Manual page 230

S5PC100 USER'S MANUAL (REV1.0)
NOTE: VDD_IO contains VDDQ_DDR, VDDQ_M0, VDDQ_LCD, VDDQ_CI, VDDQ_MMC, VDDQ_AUD, VDDQ_MSM,
VDDQ_SYS0, VDDQ_SYS2, VDDQ_SYS5, VDDQ_CAN, VDDQ_EXT, and VDDQ_UHOST.
Symbol
tAL VDD_ALIVE to VDD_INT/ARM/PLL
tLP VDD_INT/ARM/PLL to VDD_IO
tOSC VDD_INT/VDD_ARM to Oscillator stabilization
tOR Oscillator stabilization to nRESET & nTRST high
tPLL PLL locking time
NOTE : 1. The user should be aware that the crystal oscillator settle-down time is not explicitly added by the
hardware during the power-on sequence. The S5PC100 assumes that the crystal oscillation is settled during the
power-supply settle-down period. However, to ensure the proper operation during wake-up from the STOP
Figure 2.4-5 Power-On Sequence
Table 2.4-12 Power on Timing Specifications
Description
Power Management
Min Typical Max
1
1
10
1
300
Units
us
ns
(1)
cycle
us
us
2.4-31