Samsung S5PC100 User Manual page 39

S5PC100 USER'S MANUAL (REV1.0)
Table 1.3-2 S5PC100 521 FCFBGA Pin Assignment − Pin Number Order (2/4)
Ball Pin Name
J8 Xm0FCLE
J9 Xm0FWEn
J10 Xm0FREn
J11 VDDQ_DDR
J12 Xm0OEn
J13 Xm0WAITn
J14 Xm0IORDn
J15 VSS
J16 VDD_ARM
J17 VDD_ARM
J18 VDD_ARM
J19 VDD_ARM
J20 VSS
J21 VDD_ARM
J24 XuTXD[1]
J25 XuTXD[3]
J26 XuCLK
J27 XspiCSn[0]
K1 XvVD[21]
K2 Xm0ADDR[6]
K3 VDDQ_M0
K4 VSS
K7 Xm0ADDR[7]
K8 Xm0ADDR[17]
K9 Xm0ADDR[19]
K19 VDD_ARM
K20 VSS
K21 Xmmc0DATA[5]
K24 Xi2c1SCL
K25 XuCTSn[0]
K26 Xi2c1SDA
K27 XspiCLK[0]
L1 XvVD[7]
L2 XvVD[14]
L3 Xm0CSn[1]
L4 Xm0CSn[0]
L7 Xm0ADDR[8]
L8 Xm0ADDR[15]
L9 Xm0ADDR[14]
L11 VSS
Ball Pin Name
L12 VSS
L13 VSS
L14 VSS
L15 VSS
L16 VDD_ARM
L17 VDD_ARM
L19 Xmmc0CLK
L20 XspiCSn[1]
L21 XjTDO
L24 XpwmTOUT[2]
L25 XuCTSn[1]
L26 Xi2c0SDA
L27 XspiCLK[1]
M1 XvVD[1]
M2 XvVD[10]
M3 XvVD[2]
M4 Xm0CSn[5]
M7 XvVD[17]
M8 XvVD[12]
M9 XvVD[20]
M11 VDD_INT
M12 VDD_INT
M13 VDD_INT
M14 VDD_INT
M15 VDD_INT
M16 VSS
M17 VDD_ARM
M19 Xmmc0DATA[4]
M20 Xmmc0DATA[3]
M21 XspiMOSI[1]
M24 XspiMOSI[0]
M25 XspiMISO[0]
M26 Xmmc0DATA[6]
M27 Xmmc0CMD
N1 Xm0CSn[4]
N2 XvVD[23]
N3 XvVD[22]
N4 VDDQ_LCD
N7 XvVD[18]
N8 XvVD[6]
Ball Pin Name
N9 XciRESET
N11 Xm0ADDR[3]
N12 VDD_INT
N16 VSS
N17 VDDQ_EXT
N19 XjTMS
N20 XspiMISO[1]
N21 Xmmc0DATA[2]
N24 Xmmc0DATA[0]
N25 Xmmc1CMD
N26 XjTRSTn
N27 Xmmc0CDn
P1 XvVD[15]
P2 XvVD[9]
P3 XvVD[8]
P4 XvVD[4]
P7 XvVD[13]
P8 XciDATA[0]
P9 VDDQ_LCD
P11 XvVD[16]
P12 XvVD[11]
P16 VSS
P17 VDD_INT
P19 XjTCK
P20 XEINT[16]
P21 Xmmc0DATA[1]
P24 Xmmc1DATA[3]
P25 Xmmc1DATA[0]
P26 Xmmc1CLK
P27 Xmmc1DATA[2]
R1 XvVD[3]
R2 XvVSYNC
R3 XvHSYNC
R4 XciDATA[5]
R7 Xi2s0SDO[0]
R8 XciHREF
R9 VDD_INT
R11 XciDATA[6]
R12 XvVD[5]
R16 VSS
BALL MAP & SIZE (SingleChip)
Ball Pin Name
R17 VDD_INT
R19 XEINT[7]
R20 XEINT[6]
R21 Xmmc0DATA[7]
R24 Xmmc1CDn
R25 Xmmc1DATA[1]
R26 VDDQ_EXT
R27 XDDR2SEL
T1 XciDATA[4]
T2 XciFIELD
T3 XvVDEN
T4 XvVCLK
T7 XiemSPWI
T8 XciVSYNC
T9 XusbDRVVBUS
T11 XvVD[0]
T12 VDDQ_MMC
T13 VSS
T14 VSS
T15 VSS
T16 VSS
T17 VDD_INT
T19 XEINT[24]
T20 XnRESET
T21 XEINT[5]
T24 XEINT[3]
T25 XEINT[22]
T26 VSS
T27 XjTDI
U1 XciDATA[2]
U2 VDDQ_CI
U3 XciPCLK
U4 XciCLKenb
U7 Xi2s0LRCK
U8 Xi2s1SDO
U9 XciDATA[7]
U11 XmsmADDR[9]
U12 Xi2s0SDI
U13 XvVD[19]
U14 Xmmc2DATA[3]
1.1-3