Samsung S5PC100 User Manual page 885

USB2.0 HS OTG
8.2.19 Device Periodic Transmit FIFO-n Size Register (DPTXFSIZn, R/W, Address = 0xED20_0104 + (n-
1)*04h)
FIFO_number: 1 ≤ n ≤ 15
This register holds the memory start address of each periodic TxFIFO to implement in Device mode. Each
periodic FIFO holds the data for one periodic IN endpoint. This register is repeated for each periodic FIFO
instantiated.
DPTXFSIZn Bit
DPTxFSize [31:16] Device Periodic TxFIFO Size
DPTxFStAddr [15:0]
8.10 -42
This value is in terms of 32-bit words
• Minimum value is 4
• Maximum value is 768
The power-on reset value of this register is the Largest
Device Mode Periodic Tx Data FIFO-n Depth. Write a new
value to this field.
Device Periodic TxFIFO RAM Start Address
Holds the start address in the RAM for this periodic FIFO.
The power-on reset value of this register is sum of the
Largest Rx Data FIFO Depth, Largest Non-Periodic Tx Data
FIFO Depth, and all lower numbered Largest Device Mode
Periodic Tx Data FIFOn Depth specified.
If you have programmed new values for the RxFIFO, Non-
Periodic TxFIFO, or device Periodic TxFIFOs, write their
sum in this field. Programmed values must not exceed the
power-on value set.
Description
S5PC100 USER'S MANUAL (REV1.0)
R/W Reset Value
R/W
n :1 (16'h300)
n :2 (16'h300)
n :3 (16'h300)
n :4 (16'h300)
n :5 (16'h300)
n :6 (16'h300)
n :7 (16'h300)
n :8 (16'h300)
n :9 (16'h300)
n :10 (16'h300)
n :11 (16'h300)
n :12 (16'h300)
n :13 (16'h300)
n :14 (16'h300)
n :15 (16'h300)
R/W
n :1 (16'h1000)
n :2 (16'h3300)
n :3 (16'h3600)
n :4 (16'h3900)
n :5 (16'h3C00)
n :6 (16'h3F00)
n :7 (16'h4200)
n :8 (16'h4500)
n :9 (16'h4800)
(16'h4B00)
(16'h4E00)
(16'h5100)
(16'h5400)
(16'h5700)
(16'h5A00)
n :10
n :11
n :12
n :13
n :14
n :15