Samsung S5PC100 User Manual page 103

S5PC100 USER'S MANUAL (REV1.0)
Port Group
MP1_3[7]
MP1_4[0]
MP1_4[1]
5.3.1 Port Group MP1_X Drive Strength Control Register
• MP1_0DRV, R/W, Address = 0xE030_03CC.
• MP1_1DRV, R/W, Address = 0xE030_03EC.
• MP1_2DRV, R/W, Address = 0xE030_040C.
• MP1_3DRV, R/W, Address = 0xE030_042C.
• MP1_4DRV, R/W, Address = 0xE030_044C.
• MP1_5DRV, R/W, Address = 0xE030_046C.
• MP1_6DRV, R/W, Address = 0xE030_048C.
• MP1_7DRV, R/W, Address = 0xE030_04AC.
• MP1_8DRV, R/W, Address = 0xE030_04CC (Reset Value = 0x2AAA)
Field
DRV[n] (n=0~7) [2n+1:2n]
5.4 PORT GROUP ETC CONTROL REGISTER
Port Group ETCx controls 5 ports
5.4.1 Port Group ETC0 Pull-up/down Register (ETC0PULL, R/W, Address = 0xE030_04E8)
00 = Disables Pull-up/down, 01 = Enables Pull-down, 10 = Enables Pull-up
Field
Reserved
ETC0PULL[2]
Reserved
ETC0PULL[4]
ETC0PULL[5]
NOTE: XjTRSTn, XjTMS, XjTDI, XnRESET, XnWRESET, XnBATF, XOM[4:0] are fixed to pull-up
Signal
DDR_D[6]
DDR_D[7]
DDR_D[8]
Bit
In case of VDD_DDR = 1.2V
00 = 2mA, 01 = 4mA, 10 = 6mA, 11 = 8mA
In case of VDD_DDR = 1.8V
00 = 4mA, 01 = 8mA, 10 = 12mA, 11 = 16mA
Bit
[3:0] Reserved
[5:4] XjTCK pulling control register
[7:6] Reserved
[9:8] XjTDO pulling control register
[11:10] XjDBGSEL pulling control register
IO Port Group
IO MP1_8[1]
IO MP1_8[2]
IO MP1_8[3]
MP1_8[4]
Description
Description
PAD CONTRL
Signal
LD2_DQSn[0]
LD2_DQSn[1]
LD2_DQSn[2]
LD2_DQSn[3]
Reset Value
0xAAAA
Reset Value
0xA
0x2
0x2
0x0
0x1
IO
O
O
O
O
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