Samsung S5PC100 User Manual page 216

S5PC100 USER'S MANUAL (REV1.0)
4.1 TRANSITION ENTERING / EXITING CONDITION
Table 2.4-6 shows the Power Saving mode state and Entering or Exiting condition. As you can see, the entering
conditions are set by the main ARM CPU.
Power Saving
Mode
Clock Off in Set the Clock-disable Bit for each IP block by
NORMAL s/w
1. CFG_STANDBYWFI in PWR_CFG = 2'b01
2. CFG_DEEP_IDLE of PWR_CFG = 1'b0.
IDLE
3. PMU_INT_DISABLE in OTHERS = 1'b1
4. ARM Command (WFI)
1. CFG_STANDBYWFI in PWR_CFG = 2'b01
DEEP-IDLE
2. CFG_DEEP_IDLE in PWR_CFG = 1'b1.
(Top domain
3. TOP_LOGIC_ON_DIDLE in PWR_CFG = 1'b1
on)
4. PMU_INT_DISABLE in OTHERS = 1'b1
5. ARM Command (WFI)
1. CFG_STANDBYWFI in PWR_CFG = 2'b01
DEEP-IDLE
2. CFG_DEEP_IDLE in PWR_CFG = 1'b1
(Top domain
3. TOP_LOGIC_ON_DIDLE in PWR_CFG = 1'b0
off)
4. PMU_INT_DISABLE in OTHERS = 1'b1
5. ARM Command (WFI)
1. CFG_STANDBYWFI in PWR_CFG = 2'b10
STOP
2. PMU_INT_DISABLE in OTHERS = 1'b1
3. ARM Command (WFI)
1. CFG_STANDBYWFI in PWR_CFG = 2'b10
2. ARM_LOGIC_ON in STOP_CFG = 1'b0
DEEP-STOP
3. PMU_INT_DISABLE in OTHERS = 1'b1
4. ARM Command (WFI)
Table 2.4-6 Power Saving Mode Entering/Exiting Condition
Enter Exit
Clear the Clock-disable Bit for each IP block
by s/w
1. All interrupt sources
(1)
1. nBATF
2. External Interrupt
3. RTC Alarm
4. RTC TICK
5. Key Pad Press event
6. HSI interface (RX)
7. Modem I/F Wake-up event
8. MMC0~2
9. Touch Screen Pen-down event
10. I2S in audio sub-domain wake-up event
11. System Timer event
(1)
1. nBATF
2. External Interrupt
3. RTC Alarm
4. RTC TICK
5. Key Pad Press event
6. HSI interface (RX)
7. Modem I/F Wake-up event
8. MMC0~2
9. Touch Screen Pen-down event
10. System Timer event
Power Management
2.4-17