Samsung S5PC100 User Manual page 376

VECTORED INTERRUPT CONTROLLER
4.7 SOFTWARE INTERRUPT REGISTER
(VICSOFTINT, R/W, ADDRESS=0XE400_0018, 0XE410_0018, 0XE420_0018)
VICSOFTINT
SoftInt [31:0]
4.8 SOFTWARE INTERRUPT CLEAR REGISTER
(VICSOFTINTCLEAR, W, ADDRESS=0XE400_001C, 0XE410_001C, 0XE420_001C)
VICSOFTINTCLEAR
SoftIntClear
4.9 PROTECTION ENABLE REGISTER
(VICPROTECTION, R/W, ADDRESS=0XE400_0020, 0XE410_0020, 0XE420_0020)
VICPROTECTION
Reserved
Protection
4.1-20
Bit
Setting a bit HIGH generates a software interrupt for the selected
source before interrupt masking.
Read:
0 = Software interrupt inactive
1 = Software interrupt active
Write:
0 = No effect
1 = Enables Software interrupt
There is one bit of the register for each interrupt source.
Bit
Clears corresponding bits in the VICSOFTINT Register:
0 = No effect
[31:0]
1 = Disables Software interrupt in the VICSOFTINT Register.
There is one bit of the register for each interrupt source.
Bit
[31:1] Reserved, read as 0, do not modify.
Enables or disables protected register access:
0 = Disables Protection mode
1 = Enables Protection mode.
If enabled, only privileged mode accesses (reads and writes)
can access the interrupt controller registers, that is, if
[0]
HPROT[1] is set HIGH for the current transfer.
If disabled, both user mode and privileged mode can access
the registers.
This register can only be accessed in privileged mode, even if
protection mode is disabled.
S5PC100 USER'S MANUAL (REV1.0)
Description
Description
Description
Reset Value
0x00000000
Reset Value
-
Reset Value
0x0
0x0