S5PC100 USER'S MANUAL (REV1.0)
3.2
1 CORESIGHT SYSTEM OVERVIEW
1.1 ABOUT CORESIGHT SYSTEMS GENERALS
CoreSight systems provide all the infrastructure you require to debug, monitor, and optimize the performance of a
complete System on Chip (SoC) design.
There are historically three main ways of debugging an ARM processor based SoC:
•
Conventional JTAG debug. This is invasive debug with the core halted using:
√
breakpoints and watchpoints to halt the core on specific activity
√
a debug connection to examine and modify registers and memory and provide single-step execution.
•
Conventional monitor debug. This is invasive debug with the core running using a debug monitor that resides
in memory.
•
Trace. This is non-invasive debug with the core running at full speed using:
√
collection of information on instruction execution and data transfers
√
delivery off-chip in real-time
√
tools to merge data with source code on a development workstation for later analysis.
CORESIGHT
CORESIGHT
3.2-1