Samsung S5PC100 User Manual page 294

INTELLIGENT ENERGY MANAGEMENT
5.2.2 DVS Emulation Slot Time Register (IECDVSEMSTR, R/W, Address = 0xE110_0004)
IECDVSEMSTR
Reserved
Slot time
5.2.3 DPC Target Performance Register (IECDPCTGTPERF, W, Address = 0xE110_0008)
IECDPCTGTPERF
Reserved
IECDPCTGTPERF
NOTE: This register is read as 0x00.
5.2.4 DPC Current Performance Register (IECDPCCRNTPERF, R, Address = 0xE110_000C)
IECDPCCRNTPERF
Reserved
IECDPCCRNTPERF
5.2.5 Interrupt Mask Set and Clear Register(IECIMSC, R/W, Address = 0xE110_0010)
IECIMSC
Reserved
CPU Sleep Interrupt
Mask (CSIM)
CPU Wake-up
Interrupt Mask (CWIM)
2.5-22
maximum performance.
Bits
[31:10] Reserved, read undefined, do not modify.
The time in μs for each slot of a PWM frame. This is reset
[9:0]
to 0x63. For example, if you want each time slot to be
100μs in length, then the slot time bits must be
programmed with 0x63. Similarly, if you want each time slot
to be 200μs in length, then the slot time bits must be
programmed with 0xC7a.
Bits
[31:8] Reserved, read undefined, do not modify.
[7:0] Sets the target fractional performance level.
At system reset, the value 0x80 (100%).
Bits
[31:8] Reserved, read undefined, do not modify.
[7:0] Returns the current performance level as indicated to the
IEC by the DCG on the IECCRNTDCGIDX inputs.
Bits
[31:2] Reserved, read undefined, do not modify.
[1] On a read, the current mask of the CSIM is returned. On a
write of 1, the mask of CSIM interrupt is set. A write of 0
clears the mask. The reset value is 1.
[0] On a read, the current mask of the CWIM is returned. On
a write of 1, the mask of CWIM interrupt is set. A write of 0
clears the mask. The reset value is 1.
S5PC100 USER'S MANUAL (REV1.0)
Description
Description
Description
Description
Reset Value
0
0x63
Reset Value
0
0x80
Reset Value
0
System
Dependent
Reset Value
0
1
1