Samsung S5PC100 User Manual page 678

S5PC100 USER'S MANUAL (REV1.0)
4.2.10 Status Pending Clear Register
•
PENDING_CLR_REG0, R/W, Address = 0xEC30_0024
•
PENDING_CLR_REG1, R/W, Address = 0xEC40_0024
•
PENDING_CLR_REG2, R/W, Address = 0xEC50_0024
PENDING_CLR_REGn
TX_UNDERRUN_CLR
TX_OVERRUN_CLR
RX_UNDERRUN_CLR
RX_OVERRUN_CLR
TRAILING_CLR
Bit
TX underrun pending clear bit
[4]
0 = Non-Clear
TX overrun pending clear bit
[3]
0 = Non-Clear
RX underrun pending clear bit
[2]
0 = Non-clear
RX overrun pending clear bit
[1]
0 = Non-Clear
Trailing pending clear bit
[0]
0 = Non-Clear
Description
1 = Clear
1 = Clear
1 = Clear
1 = Clear
1 = Clear
SPI CONTROLLER
Reset Value
0
0
0
0
0
8.3-13