Samsung S5PC100 User Manual page 893

USB2.0 HS OTG
8.2.27 Host Channel-N Characteristics Register (HCCHARn, R/W, Address = 0xED20_0500+n*20h)
Channel_number: 0 ≤ n ≤ 15
HCCHARn Bit
ChEna [31]
ChDis [30]
OddFrm [29]
DevAddr [28:22] Device Address
MC/EC [21:20] Multi Count/Error Count
EPType [19:18] Endpoint Type
LSpdDev [17]
8.10 -50
Channel Enable
This field is set by the application and cleared by the OTG host.
• 1'b0 : Disables Channel
• 1'b1 : Enables Channel
Channel Disable
The application sets this bit to stop transmitting/ receiving data
on a channel, even before the transfer for that channel is
complete. The application must wait for the Channel Disabled
interrupt before treating the channel as disabled.
Odd Frame
This field is set (reset) by the application to indicate that the
OTG host must perform a transfer in an odd (micro) frame. This
field is applicable for only periodic transactions.
• 1'b0 : Even (micro)frame
• 1'b1 : Odd (micro)frame
This field selects the specific device serving as the data source
or sink.
If the Split Enable bit of the Host Channel-n Split Control
register is reset (1'b0), this field indicates to the host the number
of transactions that must be executed per microframe for this
endpoint.
• 2'b00 : Reserved
• 2'b01 : 1 transaction
• 2'b10 : 2 transactions to be issued for this endpoint per
microframe
• 2'b11 : 3 transactions to be issued for this endpoint per
microframe
If HCSPLTn.SpltEna is set, this field indicates the number of
immediate retries to be performed for a periodic split
transactions on transaction errors. This field must be set to at
least 2'b01.
Indicates the transfer type selected.
• 2'b00 : Control
• 2'b01 : Isochronous
• 2'b10 : Bulk
• 2'b11 : Interrupt
Low-Speed Device
This field is set by the application to indicate that this channel is
Description
S5PC100 USER'S MANUAL (REV1.0)
R/W
R_WS
_SC
R_WS
_SC
R/W
R/W
R/W
R/W
R/W
Reset
Value
1'b0
1'b0
1'b0
7'h0
2'b0
2'b0
1'b0