Samsung S5PC100 User Manual page 957

SD/MMC CONTROLLER
Function Signal
SD_1_D[3]
SD_1_CDn
SD_2_CLK
SD_2_CMD
SD_2_D[0]
SD_2_D[1]
SD_2_D[2]
SD_2_D[3]
SD_2_CDn
NOTE: HSMMC external pads are shared with CAMIF or SPI. In order to use these pads for HSMMC, set the GPIO
before the HSMMC started. Refer to the GPIO chapter for correct GPIO settings.
9 REGISTER DESCRIPTION
Configuration register fields are assigned to one of the attributes described below:
Register
SDMASYSAD0
BLKSIZE0
BLKCNT0
ARGUMENT0
TRNMOD0
CMDREG0
RSPREG0_0
RSPREG1_0
RSPREG2_0
RSPREG3_0
BDATA0
PRNSTS0
HOSTCTL0
PWRCON0
BLKGAP0
WAKCON0
CLKCON0
TIMEOUTCON0
SWRST0
8.12-22
I/O
IN/OUT Data for HSMMC1
INPUT Card Detect for HSMMC1
OUTPUT Clock for HSMMC2
IN/OUT Command for HSMMC2
IN/OUT Data for HSMMC2
IN/OUT Data for HSMMC2
IN/OUT Data for HSMMC2
IN/OUT Data for HSMMC2
INPUT Card Detect for HSMMC2
Address R/W
0xED80_0000 R/W
0xED80_0004 R/W
0xED80_0006 R/W
0xED80_0008 R/W
0xED80_000C R/W
0xED80_000E R/W
0xED80_0010 ROC
0xED80_0014 ROC
0xED80_0018 ROC
0xED80_001C ROC
0xED80_0020 R/W
0xED80_0024 R/ROC
0xED80_0028 R/W
0xED80_0029 R/W
0xED80_002A R/W
0xED80_002B R/W
0xED80_002C R/W
0xED80_002E R/W
0xED80_002F R/W
Descrioption
Description
SDMA System Address register (Channel 0)
Host DMA Buffer Boundary and Transfer
Block Size Register (Channel 0)
Blocks count for current transfer (channel 0)
Command Argument Register (Channel 0)
Transfer Mode Setting Register (Channel 0)
Command Register (Channel 0)
Response Register 0 (Channel 0)
Response Register 1 (Channel 0)
Response Register 2 (Channel 0)
Response Register 3 (Channel 0)
Buffer Data Register (Channel 0)
Present State Register (Channel 0)
Host Control Register (Channel 0)
Power Control Register (Channel 0)
Block Gap Control Register (Channel 0)
Wakeup Control Register (Channel 0)
Clock Control Register (Channel 0)
Timeout Control Register (Channel 0)
Software Reset Register (Channel 0)
S5PC100 USER'S MANUAL (REV1.0)
Pad
Xmmc1DATA[3]
Xmmc1CDn
Xmmc2CLK
Xmmc2CMD
Xmmc2DATA[0]
Xmmc2DATA[1]
Xmmc2DATA[2]
Xmmc2DATA[3]
Xmmc2CDn
Reset Value
0x000A0000
Type
muxed
muxed
muxed
muxed
muxed
muxed
muxed
muxed
muxed
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0