Samsung S5PC100 User Manual page 291

S5PC100 USER'S MANUAL (REV1.0)
Register
APC_PWICMD
APC_PWIDATAWR
APC_PWIDATARD
APC_CONTROL
APC_STATUS
APC_MINVDD_LIMIT
APC_VDDCHK
APC_VDDCHKD
APC_PREDLYSEL
APC_IMASK
APC_ISTATUS
APC_ICLEAR
APC_UNSH_NOISE
APC_WKUP_DLY
APC_SLK_SMP
APC_CLKDIV_PWICL
K
APC_OVSHT_LMT
APC_CLP_CTRL
APC_SS_SRATE
APC_IGAIN4
APC_IGAIN1
APC_IGAIN2
APC_IGAIN3
APC_PL1_CALCODE
APC_PL2_CALCODE
APC_PL3_CALCODE
APC_PL4_CALCODE
APC_PL5_CALCODE
APC_PL6_CALCODE
APC_PL7_CALCODE
APC_PL8_CALCODE
APC_PL1_COREVDD
APC_PL2_COREVDD
APC_PL3_COREVDD
Table 2.5-4 Register Summary of APC
Address R/W
0xE100_0000 R/W
0xE100_0004 R/W
0xE100_0008 RO
0xE100_0010 R/W
0xE100_0014 RO
0xE100_0018 R/W
0xE100_001C R/W
0xE100_0020 R/W
0xE100_0024 R/W
0xE100_0028 R/W
0xE100_002C RO
0xE100_0030 WO
0xE100_0034 R/W
0xE100_0038 R/W
0xE100_003C R/W
0xE100_0040 R/W
0xE100_0050 R/W
0xE100_0054 R/W
0xE100_0058 R/W
0xE100_005C R/W
0xE100_0060 R/W
0xE100_0064 R/W
0xE100_0068 R/W
0xE100_0080 R/W
0xE100_0084 R/W
0xE100_0088 R/W
0xE100_008C R/W
0xE100_0090 R/W
0xE100_0094 R/W
0xE100_0098 R/W
0xE100_009C R/W
0xE100_00A0 R/W
0xE100_00A4 R/W
0xE100_00A8 R/W
Description
PWI Command Register
PWI Write Data Register
PWI Read Data Register
APC Control Register
APC Status Register
Minimum Limit Register
VDD Check Register
VDD Delay Time Register
VDD Pre-delay Select Register
APC Interrupt Mask Register
APC Interrupt Status Register
APC Interrupt Clear Register
APC Undershoot Threshold and Noise
Limit Register
Wakeup Delay Register
Slack Sample Count Register
PWI Clock Division Register
APC Overshoot Limit Register
APC Closed-loop Control
APC Steady State Slew Rate Register
Integrator's Gain 4 Register
Integrator's Gain 1 Register
Integrator's Gain 2 Register
Integrator's Gain 3 Register
Calibration Code 1 Register
Calibration Code 2 Register
Calibration Code 3 Register
Calibration Code 4 Register
Calibration Code 5 Register
Calibration Code 6 Register
Calibration Code 7 Register
Calibration Code 8 Register
Open-loop VDD Core Register 1
Open-loop VDD Core Register 2
Open-loop VDD Core Register 3
INTELLIGENT ENERGY MANAGEMENT
Reset value
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x07
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x1F
0x1F
0x1F
0x1F
0x1F
0x1F
0x1F
0x1F
0x7F
0x7F
0x7F
2.5-19