Samsung S5PC100 User Manual page 375

S5PC100 USER'S MANUAL (REV1.0)
4.4 INTERRUPT SELECT REGISTER
(VICINTSELECT, R/W, ADDRESS=0XE400_000C, 0XE410_000C, 0XE420_000C)
VICINTSELECT Bit
IntSelect [31:0]
4.5 INTERRUPT ENABLE REGISTER
(VICINTENABLE, R/W, ADDRESS=0XE400_0010, 0XE410_0010, 0XE420_0010)
VICINTENABLE Bit
IntEnable [31:0]
4.6 INTERRUPT ENABLE CLEAR
(VICINTENCLEAR, W, ADDRESS=0XE400_0014, 0XE410_0014, 0XE420_0014)
VICINTENCLEAR
IntEnable Clear [31:0]
Selects interrupt type for interrupt request:
0 = IRQ interrupt
1 = FIQ interrupt
There is one bit of the register for each interrupt source.
Enables the interrupt request lines, which allows the interrupts to
reach the processor.
Read:
0 = Disables Interrupt
1 = Enables Interrupt
Use this register to enable interrupt. The VICINTENCLEAR Register
must be used to disable the interrupt enable.
Write:
0 = No effect
1 = Enables Interrupt.
On reset, all interrupts are disabled.
There is one bit of the register for each interrupt source.
Bit
Clears corresponding bits in the VICINTENABLE Register:
0 = No effect
1 = Disables Interrupt in VICINTENABLE Register.
There is one bit of the register for each interrupt source.
VECTORED INTERRUPT CONTROLLER
Description
Description
Description
Reset Value
0x00000000
Reset Value
0x00000000
Reset Value
-
4.1-19