Samsung S5PC100 User Manual page 856

S5PC100 USER'S MANUAL (REV1.0)
Register
HCINTMSK15 0xED20_06EC
HCTSIZ15 0xED20_06F0
HCDMA15 0xED20_06F4
Device Mode Registers
Device Global Registers
DCFG 0xED20_0800
DCTL 0xED20_0804
DSTS 0xED20_0808
DIEPMSK 0xED20_0810
DOEPMSK 0xED20_0814
DAINT 0xED20_0818
DAINTMSK 0xED20_081C
DTKNQR1 0xED20_0820
DTKNQR2 0xED20_0824
DVBUSDIS 0xED20_0828
DVBUSPULSE 0xED20_082C
DTKNQR3 0xED20_0830
DTKNQR4 0xED20_0834
Device Logical IN Endpoint-Specific Registers
DIEPCTL0 0xED20_0900
DIEPINT0 0xED20_0908
DIEPTSIZ0 0xED20_0910
DIEPDMA0 0xED20_0914
DIEPCTL1 0xED20_0920
DIEPINT1 0xED20_0928
DIEPTSIZ1 0xED20_0930
DIEPDMA1 0xED20_0934
DIEPCTL2 0xED20_0940
DIEPINT2 0xED20_0948
DIEPTSIZ2 0xED20_0950
DIEPDMA2 0xED20_0954
DIEPCTL3 0xED20_0960
DIEPINT3 0xED20_0968
Offset R/W
R/W Host Channel 15 Interrupt Mask Register
R/W Host Channel 15 Transfer Size Register
R/W Host Channel 15 DMA Address Register
R/W Device Configuration Register
R/W Device Control Register
R Device Status Register
R/W Device IN Endpoint Common Interrupt Mask Register 0x0000_0000
R/W Device OUT Endpoint Common Interrupt Mask
Register
R Device ALL Endpoints Interrupt Register
R/W Device ALL Endpoints Interrupt Mask Register
R Device IN Token Sequence Learning Queue Read
Register 1
R Device IN Token Sequence Learning Queue Read
Register 2
R/W Device VBUS Discharge Time Register
R/W Device VBUS Pulsing Time Register
R Device IN Token Sequence Learning Queue Read
Register 3
R Device IN Token Sequence Learning Queue Read
Register 4
R/W Device Control IN Endpoint 0 Control Register
R/W Device IN Endpoint 0 Interrupt Register
R/W Device IN Endpoint 0 Transfer Size Register
R/W Device IN Endpoint 0 DMA Address Register
R/W Device Control IN Endpoint 1 Control Register
R/W Device IN Endpoint 1 Interrupt Register
R/W Device IN Endpoint 1 Transfer Size Register
R/W Device IN Endpoint 1 DMA Address Register
R/W Device Control IN Endpoint 2 Control Register
R/W Device IN Endpoint 2 Interrupt Register
R/W Device IN Endpoint 2 Transfer Size Register
R/W Device IN Endpoint 2 DMA Address Register
R/W Device Control IN Endpoint 3 Control Register
R/W Device IN Endpoint 3 Interrupt Register
Description
USB2.0 HS OTG
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0020_0000
0x0000_0000
0x0000_0002
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_17D7
0x0000_05B8
0x0000_0000
0x0000_0000
0x0000_8000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0080
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0080
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0080
8.10-13