Samsung S5PC100 User Manual page 176

CLOCK CONTROLLER
Register
1.5 Clock output
CLK_OUT
Reserved
1.6 Clock gating
CLK_GATE_D0_0
CLK_GATE_D0_1
CLK_GATE_D0_2
Reserved
CLK_GATE_D1_0
CLK_GATE_D1_1
CLK_GATE_D1_2
CLK_GATE_D1_3
CLK_GATE_D1_4
CLK_GATE_D1_5
Reserved
CLK_GATE_D2_0
Reserved
CLK_GATE_SCLK_0
CLK_GATE_SCLK_1
Reserved
2.3-26
Address R/W
0xE010_03FC
0xE010_0400
0xE010_0400 R/W
0xE010_0404
~
0xE010_04FC
0xE010_0500
0xE010_0500 R/W
0xE010_0504 R/W
0xE010_0508 R/W
0xE010_050C
~
0xE010_051C
0xE010_0520 R/W
0xE010_0524 R/W
0xE010_0528 R/W
0xE010_052C R/W
0xE010_0530 R/W
0xE010_0534 R/W
0xE010_0538
~
0xE010_053C
0xE010_0540 R/W
0xE010_0544
~
0xE010_055C
0xE010_0560 R/W
0xE010_0564 R/W
0xE010_0568
~
0xE010_7FFC
Description
Select clock output
Reserved
Control HCLKD0 / PCLKD0 clock gating 0
(System1)
Control HCLKD0 / PCLKD0 clock gating 1
(Memory)
Control PCLKD0 clock gating 2 (System2)
Reserved
Control HCLKD1 / PCLKD1 clock gating 0
(File)
Control HCLKD1 / PCLKD1 clock gating 1
(Multimedia1)
Control HCLKD1 / PCLKD1 clock gating 2
(Multimedia2)
Control HCLKD1 / PCLKD1 clock gating 1
(System)
Control HCLKD1 / PCLKD1 clock gating 2
(Connectivity)
Control HCLKD1 / PCLKD1 clock gating 2
(Audio)
Reserved
Control HCLKD2 clock gating 0 (Audio)
Reserved
Control SCLK clock gating (System)
Control SCLK clock gating (Multimedia)
Reserved
S5PC100 USER'S MANUAL (REV1.0)
Reset Value
0x0000_0000
0x0000_0000
0x0000_007F
0x0000_003F
0x0000_0007
0x0000_0000
0x0000_00FF
0x0000_01FF
0x0000_001F
0x0000_03FF
0x0000_3FFF
0x0000_03FF
0x0000_0000
0x0000_0000
0x0000_0000
0x0003_FFFF
0x0000_1FFF
0x0000_0000