Samsung S5PC100 User Manual page 126

PAD CONTROL
5.5.79 Non wake-up Interrupt 18Mask Register (NWU_INT18_MASK, R/W, Address = 0xE030_0948)
Field
Reserved
NWU_INT18_MASK[n]
5.5.80 Non wake-up Interrupt 19 Mask Register (NWU_INT19_MASK, R/W, Address = 0xE030_094C)
Field
Reserved
NWU_INT19_MASK[n]
5.5.81 Non wake-up Interrupt 20 Mask Register (NWU_INT20_MASK, R/W, Address = 0xE030_0950)
Field
Reserved
NWU_INT20_MASK[n]
5.5.82 Non wake-up Interrupt 0 Pending Register (NWU_INT0_PEND, R/W, Address = 0xE030_0A00)
Field
Reserved
NWU_INT0_PEND[n]
5.5.83
5.5.84 Non wake-up Interrupt 1 Pending Register (NWU_INT1_PEND, R/W, Address = 0xE030_0A04)
Field
Reserved
NWU_INT1_PEND[n]
5.5.85 Non wake-up Interrupt 2 Pending Register (NWU_INT2_PEND, R/W, Address = 0xE030_0A08)
Field
Reserved
NWU_INT2_PEND[n]
5.5.86 Non wake-up Interrupt 3 Pending Register (NWU_INT3_PEND, R/W, Address = 0xE030_0A0C)
Field
Reserved
NWU_INT3_PEND[n]
2.2-74
Bit
[31:8] Reserved
[n] 0 = Enabled, 1 = Masked (n=0,..,7)
Bit
[31:8] Reserved
[n] 0 = Enabled, 1 = Masked (n=0,..,7)
Bit
[31:4] Reserved
[n] 0 = Enabled, 1 = Masked (n=0,..,3)
Bit
[31:8] Reserved
[n] 1 = Interrupt occurred (n=0,...,7)
Bit
[31:5] Reserved
[n] 1 = Interrupt occurred (n=0,...,4)
Bit
[31:8] Reserved
[n] 1 = Interrupt occurred (n=0,...,7)
Bit
[31:5] Reserved
[n] 1 = Interrupt occurred (n=0,...,4)
S5PC100 USER'S MANUAL (REV1.0)
Description
Description
Description
Description
Description
Description
Description
Reset Value
0
1
Reset Value
0
1
Reset Value
0
1
Reset Value
0
0
Reset Value
0
0
Reset Value
0
0
Reset Value
0
0