Installing The Intel Acceleration Stack Runtime Package On The Host Machine - Intel D5005 Quick Start Manual

Purpose
OPAE Software
Development Kit (SDK)
Intel Quartus Prime Pro
Edition
2.4.2. Installing the Intel Acceleration Stack Runtime Package on the
Host Machine
Follow these instructions to extract the release package and upgrade the kernel:
1. Extract the archive file:
tar xvf *rte_installer.tar.gz
2. Change to install directory:
cd *rte_installer
3. Run
./setup.sh
./setup.sh
4. You are prompted with the following question: Do you wish to install the OPAE:
Option
Select Yes
Select No
5. Accept the license.
6. When you receive an installation directory prompt, you can specify an install
directory. Otherwise, the installer uses the default directory at
<username>/intelrtestack
7. Run the initialization script to set the required environment variables and
OPAE_PLATFORM_ROOT
source /home/<username>/intelrtestack/init_env.sh
8. Run the script
management controller (BMC). For detailed instructions, refer to
Interface Manager (FIM) and BMC Firmware Version
The
$OPAE_PLATFORM_ROOT
throughout the document. The following command prints the environment variable
OPAE_PLATFORM_ROOT
echo $OPAE_PLATFORM_ROOT
Intel Acceleration Stack Quick Start Guide: Intel FPGA Programmable
Acceleration Card D5005
8
Acceleration Stack for
Runtime
Software development of
runtime host application
OPAE SDK version 1.1.4-3
Not Included or required
and follow the prompts:
Description
If you have admin and network access.
If you do not have admin and network access. After the installation, follow the
manual steps listed in section Installing the OPAE Software Package.
.
:
setup_fim_and_bmc.sh
is used as a relative path to executables and files
.
2. System Requirements and Release Installation
Acceleration Stack for Development
RTL development of an AFU using the Intel Quartus
Pro Edition and the Acceleration Stack
OPAE SDK version 1.1.4-3
Included: Intel Quartus Prime Pro Edition 18.1.2 with
related interface licenses (SR-IOV and Low Latency 10
Gbps Ethernet MAC/PHY).
to update the fpga image and board
on page 13.
UG-20202 | 2019.08.05
®
Prime
/home/
Identify the FPGA
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