Move Instructions - Cirrus Logic EP93 Series User Manual

MaverickCrunch Co-Processor
EP93xx User's Guide

3.5.2 Move Instructions

3
31:28
cond 1 1 1 0
Description:
Mnemonic:
Bit Definitions:
31:28
cond 1 1 1 0
Description:
Mnemonic:
Bit Definitions:
31:28
cond 1 1 1 0
Description:
Mnemonic:
Bit Definitions:
3-24
Move Single Precision Floating Point from ARM to MaverickCrunch
27:24 23:22 21
0 0 0
Moves a single precision floating point number from an ARM register into the
upper half of a MaverickCrunch register.
CFMVSR<cond> CRn, Rd
Rd:
CRn:
Move Single Precision Floating Point from MaverickCrunch to ARM
27:24 23:22 21
0 0 0
Moves a single precision floating point number from the upper half of a
MaverickCrunch register to an ARM register.
CFMVRS<cond> Rd, CRn
Rd:
CRn:
Move Lower Half Double Precision Float from ARM to MaverickCrunch
27:24 23:22 21
0 0 0
Moves the lower half of a double precision floating point value from an ARM
register into the lower half of a MaverickCrunch register.
CFMVDLR<cond> CRn, Rd
CRn:
Rd:
20 19:16 15:12
0 CRn Rd
Source ARM register
Destination register
20 19:16 15:12
1 CRn Rd
Destination ARM register
Source register
20 19:16 15:12
0 CRn Rd
Destination register
Source ARM register
Copyright 2007 Cirrus Logic
11:8 7:5 4
0 1 0 0 0 1 0 1
11:8 7:5 4
0 1 0 0 0 1 0 1
11:8 7:5 4
0 1 0 0 0 0 0 1
DS785UM1
3:0
CRm
3:0
CRm
3:0
CRm