Cirrus Logic EP93 Series User Manual page 248

Arm 9 embedded processor family
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Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User's Guide
Bit Descriptions:
7
Hardware Cursor Registers
CursorAdrStart
31
30
15
14
Address: 0x8003_0060
Default: 0x0000_0000
Definition: Cursor Image Address Start register
Bit Descriptions:
7-66
RSVD:
BGOFF:
29
28
27
26
13
12
11
10
ADR:
NA:
Copyright 2007 Cirrus Logic
Reserved - Unknown during read
Background Off - Read/Write
The function of Background Off value that is written to this
field is defined by the selected blink mode.
When the value of the M field in the
select 'blink to background' mode, the BGOFF field
defines a 24-bit color for the background.
When the value of the M field in the
select 'blink to offset' mode, the BGOFF field defines the
mathematical offset value for the blink color. The format for
the mathematical offset is based on the color display mode
- that is, 888, 565, 555 (see
33).
25
24
23
22
ADR
9
8
7
6
ADR
Address - Read/Write
The Cursor Address Start value that is written to this field
specifies the SDRAM location that contains the start of the
cursor image. The cursor image is 2-bits per pixel, and is
stored linearly. The amount of storage space is dependent
on the width and height of the cursor.
Not Assigned - Will return the written value
PixelMode
is written to
PixelMode
is written to
"Types of Blinking" on page 7-
21
20
19
18
5
4
3
2
17
16
1
0
NA
DS785UM1

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