Cirrus Logic EP93 Series User Manual page 669

2
I S TX Register Descriptions
I2STX0Lft
31 30 29 28
15 14 13 12
Address:
0x8082_0010 - Read/Write
Default:
0x0000_0000
Definition:
Transmit left data word for channel 0.
Bit Descriptions:
i2s_tx0_left:
I2STX0Rt
31 30 29 28
15 14 13 12
Address:
0x8082_0014 - Read/Write
Default:
0x0000_0000
Definition:
Transmit right data word for channel 0.
Bit Descriptions:
i2s_tx0_right:
DS785UM1
27 26 25 24
i2s_tx0_left
11 10 9 8
i2s_tx0_left
Transmit left data word for channel 0.
27 26 25 24
i2s_tx0_right
11 10 9 8
i2s_tx0_right
Transmit right data word for channel 0.
Copyright 2007 Cirrus Logic
23 22 21 20
7 6 5 4
23 22 21 20
7 6 5 4
2
I S Controller
EP93xx User's Guide
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3 2 1 0
19 18 17 16
3 2 1 0
21-13
21